SINGLE ELECTRON TRANSISTOR

  A single-electron transistor (SET) is a switching device that consists of two tunnel junctions sharing a common electrode and makes use of this controlled electron tunneling for amplification of current. The technology used in single-electron transistors is based on the theory of quantum tunneling. Considered an important component of nanotechnology, single-electron transistors provide high operating speed and low power consumption.A single-electron transistor is usually made by keeping two tunnel junctions in series. The transistor consists of a source electrode and a source drain, which is joined with the help of a tunneling island that is also capacitively connected to a gate. The electrons can travel to another electrode only through the insulator. The resistance feature of a single-electron transistor depends on the size of the nanoparticles, capacitance ad electron tunneling. Single-electron transistors have many applications. They can be used as ultrasensitive microwave detectors and can also be used to detect infrared signals at room temperature. They are also efficient charge sensors capable of reading spin or charge qubits. Their high sensitivity feature allows them to be used as electrometers in experiments

 requiring high levels of specificity.

 

article by

BHUSHAN LOKHANDE

SI-NANOWIRE TRANSISTOR

   All modern transistors have a gate electrode, which controls the flow of holes and electrons between the source and drain contacts. In CMOS transistors, this modulation relies on the presence of a junction between the channel and the source and drain contacts. With the decreasing dimensions of modern transistors, generating these junctions is becoming increasingly difficult. The first patented field effect transistor, suggested by Julius Edgar Lilienfeld, in the 1920's was a junction-free device. The device was designed such that charge carriers could be depleted by the actions of the gate. However, in order to be able to fully turn off the device, a very thin nanoscale channel (nanowire) is required.

 

 The technology for generating for generating such thin structures did not exiunction less transistor was manufactured in 2010 by Colinge et al. Using standard Silicon on Insulator (SOI) technology and electron-beam lithography, they were able to produce the first junction less transistor

The light blue (bottom) surface depicts the bottom of the wafer, such that the volume between the two blue surfaces is the silicon wafer. The first step is the generation of the oxide mask layer shown in Figure, followed by the application of the silicon nanowire using an AFM in NCM in Figure. Subsequently, TetraMethylAmmonium Hydroxide (TMAH) is used in order to selectively and anisotropically etch away the silicon. TMAH is etching process which has an approximate 1:1000 etch ratio for SiO2 with respect to silicon. The final step is the removal of the silicon dioxide, which is done once again using wet etching, but with hydrofluoric acid (HF).

article by 

AMRUTA LHAYAKAR

 FINFET

 

 What is FinFET technology?
A fin field-effect transistor (FinFET) is a multigate device, a MOSFET (metal-oxide-semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double gate structure.

any one technology node the FinFET has several advantages over its planar counterpart including, but not limited to:

Very good electrostatic control of the channel, meaning the channel can be “choked off” more easily. FinFETs boast a near-ideal sub-threshold behavior (associated with leakage), something that’s not easy to achieve in planar technology without considerable effort.

Greatly reduced short channel effects. The short channel effects in planar technology are complex and have a significant impact on gate length variations and, therefore, on electrical performance.
High integration density, 3D, thanks to vertical channel orientation delivers more performance per linear “w” than planar even after the isolation dead-area between the fins is taken into account.
Smaller variability, especially variability resulting from random dopant fluctuation primarily due to doping-free or low doping channels. 

 

 

 

 

 Why do we need FinFET?

FinFET technology provides numerous advantages over bulk CMOS, such as higher drive current for a given transistor footprint, hence higher speed, lower leakage, hence lower power consumption, no random dopant fluctuation, hence better mobility and scaling of the transistor beyond 28nm.

 

article by

GANESH MAHER

 CNTFET

 

  A carbon nanotube field-effect transistor (CNTFET) refers to a field effect transistor that utilizes a single carbon nanotubes or an array of carbon nanotubes as the channel material instead of bulk silicon in the traditional MOSFET structure. First demonstrated in 1998, there have been major developments in CNTFETs since.

^{According to Moore , the dimensions of individual devices in an integrated circuit have been decreased by a factor of approximately two every two years. This scaling down of devices has been the driving force in technological advances since the late 20th century. However, as noted by ITRS 2009 edition, further scaling down has faced serious limits related to fabrication technology and device performances as the critical dimension shrunk down to sub-22 nm range.The limits involve electron tunneling through short channels and thin insulator films, the associated leakage currents, passive power dissipation, short channel effects, and variations in device structure and doping. These limits can be overcome to some extent and facilitate further scaling down of device dimensions by modifying the channel material in the traditional bulk MOSFET structure with a single carbon nanotube or an array of carbon nanotubes.}  

Type of CNTFET-

The field effect transistors made of carbon nanotubes so far can be classified into:

• Back gate CNTFET
•  Top gate CNTFET  
• Wrap-around gate CNTFET
•   Suspended CNTFETs
  

 article by

VAISHNAVI JAHAGIRDAR